1. Field of the Invention
This invention relates generally to the field of integrated circuit fabrication, and more specifically to the deposition and processing of spin-on dielectric materials.
2. Description of the Related Art
Integrated circuit manufacturers increasingly face difficulties with scaling. According to Moore's Law, the number of transistors per unit of area grows exponentially. For this to continue, several major changes in semiconductor manufacturing are expected. Transistors are not the only devices that must get smaller on an integrated circuit. Even though packing transistors closer is important, they must still be electrically separated from each other. One method of keeping transistors separate from each other is known as trench isolation. Trench isolation is the practice of creating trenches in the substrate in order to separate electrical components on the chip. The trenches are filled with an insulator that will prevent cross-talk between transistors.
Shallow Trench Isolation (STI) is becoming more prevalent in the design of integrated circuits. In STI, the trench width is becoming increasingly smaller with successive generations. The size can vary, but a trench less than a micron wide has become quite common. STI shrinks the area needed to isolate transistors from each other. STI also offers smaller channel width encroachment and better planarity than technologies used for larger process nodes.
STI trenches are typically filled with oxide, but how that is done varies. They can be filled by chemical vapor deposition (CVD), such as high-density plasma chemical vapor deposition (HDP CVD) using tetraethyl orthosilicate (TEOS) as a precursor with or without ozone. However, filling these trenches with oxide gets more challenging as the width of the trenches gets smaller and aspect ratios thus increase. CVD deposits the material from the outside of the trench inwards, leading to pinching at the upper corners. This leads to problems such as the creation of voids, areas where the filler does not accumulate, or to seams where the growth from the sides of the edges meets. Such seams can create inconsistencies in subsequent processing, such as planarization or other etch steps. HDP CVD methods can also result in undesired erosion of underlying features.
Another major method for filling isolation trenches is known as spin-on deposition. Spin-on deposition entails dripping a liquid precursor onto the wafer surface in a predetermined amount. The wafer is subjected to rapid spinning (e.g., up to 6000 rpm). The spinning uniformly distributes the liquid on the surface by centrifugal forces. The liquid fills low points and automatically planarizes the surface. Finally, the coating is baked in order to solidify the material. While spin-on can be more expensive and difficult to implement, it is seen as the long-range solution for the deposition of dielectric materials because of its ability to fill with no seam, void, or erosion problems.
However, there have been many problems with the implementation of trench-fill systems. For the spin-on system, one of these problems has been achieving acceptable bulk density in sub-micron STI trenches. There are some methods of achieving density in these sub-micron spaces, including the use of electron-beam and steam oxidation curing. However, available methods do not provide a full solution to the problems faced in this arena. For example, the inventors have found that known methods of densification can lead to material that is too vulnerable to recess at the top of the trench during polishing and wet cleans. Thus, the available solutions do not fully address the problems related to this area.